<- [[start]] ====== Umbenennung aller Designs ====== ~~TASK:Stephan Linz?2014-02-28!!~~ Es hat sich herausgestellt, dass die Namen der Referenzdesigns nicht immer eindeutig erscheinen. Zum Beispiel ist es ein implizite Annahme, dass ein Design mit MMU im Namen immer ein klassisches MicroBlaze Design mit einer MMU fähigen CPU im Big Endian Mode ist und demzufolge nur an einem PLB oder älteren Bus angebunden ist. Welcher Bus konkret wird aber damit nicht definiert. Dagegen sind die neueren MicroBlaze Designs mit einer MMU fähigen CPU im Little Endian Mode als AXI gekennzeichnet, da eine solche CPU auch nur an diesem Bus angebunden sein kann. Diese impliziten Regeln könnten aber mit aufkommen neuerer Bussysteme, z.B. solche die für Big und Little Endian entworfen sind, zu Problemen in der Namensgebung der Designs führen. Ferner ist es zum jetzigen Zeitpunkt nicht möglich, eine Unterscheidung zwischen Designs mit MMU und ohne MMU zu definieren oder sogar komplett andere CPU Kerne zu nutzen. Daher soll ein neuer Schlüssel für die Namensgebung eingeführt werden. ===== Neuer Namensschlüssel ===== Der neue Schlüssel soll alle Unzulänglichkeiten beseitigen und entwickelt sich mit dem Blick von oben nach unten mit steigender Diversität der möglichen Eigenschaften eines Designs wie folgt. Die Groß- und Kleinschreibung wird nicht beachtet. := --- := - := { "xilinx" | "avnet" } := { | } := ( == "xilinx" ) ? { "sp3adsp1800" | "ml505" | "ml605" } := ( == "avnet" ) ? { "s6lx9" | "s6lx150t" } := -- := { "mb" | "mble" } := { "mmu" | "nommu" } := { | } := ( == "mb" ) ? { "opb" | "plb" } := ( == "mble" ) ? { "axi" } := { "full" | "lite" | "tiny" } := { "11.4" | "12.2" | "12.4" | "12.4" | "13.2" | "13.4" | "13.4" } ==== Beispiel ==== Aus dem alten Namen Avnet-S6LX9-AXI-tiny-13.2 wird der neue Name Avnet-S6LX9-MBLE-MMU-AXI-tiny-13.2 ===== Alt-zu-Neu Matrix ===== | Design-\\ name || Eigenschaften |||||||||||| | ::: |^ Core ^ Endianess ^^ MMU ^^ Bus ^^^ SoC ^^^ ISE | | alt ^ neu ^ ::: ^ big ^ little ^ ja ^ nein ^ OPB ^ PLB ^ AXI ^ full ^ lite ^ tiny ^ ::: | | Avnet-S6LX150T-AXI-full-13.2 ^ Avnet-S6LX150T-MBLE-MMU-AXI-full-13.2 | MicroBlaze | ^ X ^ X | | | ^ X ^ X | | | 13.2 | | Avnet-S6LX150T-AXI-full-13.3 ^ Avnet-S6LX150T-MBLE-MMU-AXI-full-13.3 | MicroBlaze | ^ X ^ X | | | ^ X ^ X | | | 13.3 | | Avnet-S6LX150T-AXI-full-13.4 ^ Avnet-S6LX150T-MBLE-MMU-AXI-full-13.4 | MicroBlaze | ^ X ^ X | | | ^ X ^ X | | | 13.4 | | Avnet-S6LX150T-AXI-lite-13.2 ^ Avnet-S6LX150T-MBLE-MMU-AXI-lite-13.2 | MicroBlaze | ^ X ^ X | | | ^ X | ^ X | | 13.2 | | Avnet-S6LX150T-AXI-lite-13.3 ^ Avnet-S6LX150T-MBLE-MMU-AXI-lite-13.3 | MicroBlaze | ^ X ^ X | | | ^ X | ^ X | | 13.3 | | Avnet-S6LX150T-AXI-lite-13.4 ^ Avnet-S6LX150T-MBLE-MMU-AXI-lite-13.4 | MicroBlaze | ^ X ^ X | | | ^ X | ^ X | | 13.4 | | Avnet-S6LX150T-MMU-full-13.2 ^ Avnet-S6LX150T-MB-MMU-PLB-full-13.2 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.2 | | Avnet-S6LX150T-MMU-full-13.3 ^ Avnet-S6LX150T-MB-MMU-PLB-full-13.3 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.3 | | Avnet-S6LX150T-MMU-full-13.4 ^ Avnet-S6LX150T-MB-MMU-PLB-full-13.4 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.4 | | Avnet-S6LX150T-MMU-lite-13.2 ^ Avnet-S6LX150T-MB-MMU-PLB-lite-13.2 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.2 | | Avnet-S6LX150T-MMU-lite-13.3 ^ Avnet-S6LX150T-MB-MMU-PLB-lite-13.3 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.3 | | Avnet-S6LX150T-MMU-lite-13.4 ^ Avnet-S6LX150T-MB-MMU-PLB-lite-13.4 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.4 | | Avnet-S6LX9-AXI-tiny-13.2 ^ Avnet-S6LX9-MBLE-MMU-AXI-tiny-13.2 | MicroBlaze | ^ X ^ X | | | ^ X | | ^ X | 13.2 | | Xilinx-ML505-MMU-full-13.2 ^ Xilinx-ML505-MB-MMU-PLB-full-13.2 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.2 | | Xilinx-ML505-MMU-full-13.3 ^ Xilinx-ML505-MB-MMU-PLB-full-13.3 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.3 | | Xilinx-ML505-MMU-full-13.4 ^ Xilinx-ML505-MB-MMU-PLB-full-13.4 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.4 | | Xilinx-ML505-MMU-lite-13.2 ^ Xilinx-ML505-MB-MMU-PLB-lite-13.2 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.2 | | Xilinx-ML505-MMU-lite-13.3 ^ Xilinx-ML505-MB-MMU-PLB-lite-13.3 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.3 | | Xilinx-ML505-MMU-lite-13.4 ^ Xilinx-ML505-MB-MMU-PLB-lite-13.4 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.4 | | Xilinx-ML605-AXI-full-13.2 ^ Xilinx-ML605-MBLE-MMU-AXI-full-13.2 | MicroBlaze | ^ X ^ X | | | ^ X ^ X | | | 13.2 | | Xilinx-ML605-AXI-full-13.3 ^ Xilinx-ML605-MBLE-MMU-AXI-full-13.3 | MicroBlaze | ^ X ^ X | | | ^ X ^ X | | | 13.3 | | Xilinx-ML605-AXI-full-13.4 ^ Xilinx-ML605-MBLE-MMU-AXI-full-13.4 | MicroBlaze | ^ X ^ X | | | ^ X ^ X | | | 13.4 | | Xilinx-ML605-AXI-lite-13.2 ^ Xilinx-ML605-MBLE-MMU-AXI-lite-13.2 | MicroBlaze | ^ X ^ X | | | ^ X | ^ X | | 13.2 | | Xilinx-ML605-AXI-lite-13.3 ^ Xilinx-ML605-MBLE-MMU-AXI-lite-13.3 | MicroBlaze | ^ X ^ X | | | ^ X | ^ X | | 13.3 | | Xilinx-ML605-AXI-lite-13.4 ^ Xilinx-ML605-MBLE-MMU-AXI-lite-13.4 | MicroBlaze | ^ X ^ X | | | ^ X | ^ X | | 13.4 | | Xilinx-ML605-MMU-full-12.2 ^ Xilinx-ML605-MB-MMU-PLB-full-12.2 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 12.2 | | Xilinx-ML605-MMU-full-12.3 ^ Xilinx-ML605-MB-MMU-PLB-full-12.3 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 12.3 | | Xilinx-ML605-MMU-full-12.4 ^ Xilinx-ML605-MB-MMU-PLB-full-12.4 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 12.4 | | Xilinx-ML605-MMU-full-13.2 ^ Xilinx-ML605-MB-MMU-PLB-full-13.2 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.2 | | Xilinx-ML605-MMU-full-13.3 ^ Xilinx-ML605-MB-MMU-PLB-full-13.3 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.3 | | Xilinx-ML605-MMU-full-13.4 ^ Xilinx-ML605-MB-MMU-PLB-full-13.4 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.4 | | Xilinx-ML605-MMU-lite-12.2 ^ Xilinx-ML605-MB-MMU-PLB-lite-12.2 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 12.2 | | Xilinx-ML605-MMU-lite-12.3 ^ Xilinx-ML605-MB-MMU-PLB-lite-12.3 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 12.3 | | Xilinx-ML605-MMU-lite-12.4 ^ Xilinx-ML605-MB-MMU-PLB-lite-12.4 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 12.4 | | Xilinx-ML605-MMU-lite-13.2 ^ Xilinx-ML605-MB-MMU-PLB-lite-13.2 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.2 | | Xilinx-ML605-MMU-lite-13.3 ^ Xilinx-ML605-MB-MMU-PLB-lite-13.3 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.3 | | Xilinx-ML605-MMU-lite-13.4 ^ Xilinx-ML605-MB-MMU-PLB-lite-13.4 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.4 | | Xilinx-SP3ADSP1800-MMU-full-11.4 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-full-11.4 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 11.4 | | Xilinx-SP3ADSP1800-MMU-full-12.2 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-full-12.2 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 12.2 | | Xilinx-SP3ADSP1800-MMU-full-12.3 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-full-12.3 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 12.3 | | Xilinx-SP3ADSP1800-MMU-full-12.4 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-full-12.4 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 12.4 | | Xilinx-SP3ADSP1800-MMU-full-13.2 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-full-13.2 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.2 | | Xilinx-SP3ADSP1800-MMU-full-13.3 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-full-13.3 | MicroBlaze ^ X | ^ X | | ^ X | ^ X | | | 13.3 | | Xilinx-SP3ADSP1800-MMU-lite-11.4 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-lite-11.4 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 11.4 | | Xilinx-SP3ADSP1800-MMU-lite-12.2 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-lite-12.2 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 12.2 | | Xilinx-SP3ADSP1800-MMU-lite-12.3 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-lite-12.3 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 12.3 | | Xilinx-SP3ADSP1800-MMU-lite-12.4 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-lite-12.4 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 12.4 | | Xilinx-SP3ADSP1800-MMU-lite-13.2 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-lite-13.2 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.2 | | Xilinx-SP3ADSP1800-MMU-lite-13.3 ^ Xilinx-SP3ADSP1800-MB-MMU-PLB-lite-13.3 | MicroBlaze ^ X | ^ X | | ^ X | | ^ X | | 13.3 | {{tag>mbref todo tpos}}